Frame Grabbers

Matrox Rapixo CL Pro

Matrox Rapixo CL Pro PNG (1.52 MB)

Feature-packed high-performance Camera Link frame grabbers with FPGA-based image processing offload

Matrox® Rapixo CL Pro is a series of Camera Link® frame grabbers with the most comprehensive features currently available in the industry. Built upon the field-proven design of the Matrox Radient eV series of Camera Link frame grabbers, the Matrox Rapixo CL Pro offers reliable image acquisition, extended cable length support, high frame-rate image capture, and onboard image processing offload that will extend the effectiveness of the Camera Link standard for years to come.

Product Tabs

    Overview

    Matrox Rapixo CL Pro at a glance

    • Support the most high-performance Camera Link cameras with available support for Full and 80-bit mode at up to 85 MHz
    • Perform deterministic image acquisition by way of the jitter-free Camera Link 2.1 interface
    • Offload host computer of custom image processing using a field-programmable gate array (FPGA) device
    • Eliminate missed frames through a PCIe® 2.0 x8 host interface and ample onboard buffering
    • Optimize multi-camera applications via support for up to four Base or two Full/80-bit Camera Link cameras per board
    • Minimize space requirements and maximize PC compatibility through a half-length design with mini Camera Link connectivity for true single-slot operation
    • Improve and simplify system connectivity with Power-over-Camera-Link (PoCL) support at extended cable lengths

    FPGA-based image processing offload

    FPGA-based image processing offload
    The Matrox Rapixo CL Pro makes use of an FPGA device from the Xilinx Kintex™-7 family that integrates the controlling, formatting, and streaming logic of the various interfaces, and also allows developers to incorporate Matrox Imaging- or user-developed custom image pre-processing operations to offload from the host computer. Operations performed onboard are controlled through Matrox Imaging Library (MIL) X application-development software. Within MIL X, an existing FPGA configuration can be rearranged to perform a required sequence of operations without necessarily having to generate a new FPGA configuration. Using the Matrox FDK, developers generate their own FPGA configurations with custom operations written in C/C++.