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Custom ASIC Offering over 6 BOPS Performance And 64 MB SDRAM Now Standard No Charge Items On Scalable PCI Vision Processor
June 15, 1998, Montreal, Canada - The Matrox Imaging Products Group today announced increased processing power as a standard feature of the award-winning Matrox Genesis scalable PCI vision processor, at no extra cost to customers. Matrox is able to offer more value for the same money by standardizing on configurations of Matrox Genesis boards that have fully populated processing nodes. Each processing node on either a Matrox Genesis Main or Processor board now contains the Matrox Neighborhood Operations Accelerator (NOA) ASIC and 64 MBytes SDRAM local memory, in addition to the Texas Instruments' TMS320C80 DSP and Matrox Video Interface ASIC (VIA).
While all applications can benefit from more local memory per node, Matrox NOA is a significant component for applications that require processing of neighborhood operations in real time. Specifically, Matrox NOA accelerates the processing of convolutions, gray-scale morphology, binary morphology (used for improved image visualization and/or preprocessing), normalized gray-scale correlation (used for pattern recognition) and lossless JPEG compression and decompression (used for image archiving).
A significant number of imaging applications require the dedicated processing power available with Matrox NOA. Developers of systems such as bare and populated PCB inspection stations as well as wafer inspection units need to process millions of pixels using some of the processor intensive algorithms noted above. Other areas where a neighborhood accelerator is necessary include medical visualization, for digital X-Ray and angiography machines. Medical archiving is yet another area, with Matrox NOA providing the horsepower for real-time lossless compression/decompression of images.
The Matrox NOA ASIC is a MAC (multiplier/accumulator) array capable of performing 32 simultaneous sums of products at 50 MHz. These 32 on-chip parallel processing units are capable of executing over 6 billion operations per second (BOPS). By supplementing the 2 BOPS performance of the TI 'C80 DSP, Matrox provides over 8 BOPS of power per processing node. Since Matrox Genesis is a scalable solution, up to 13 processing nodes on 7 boards can deliver over 100 BOPS performance.
Each processing node contains 64 Mbytes local SDRAM operating at 50 MHz and is tied to a TI 'C80 and Matrox NOA processor by a 400 MB/second bus, effectively eliminating any processing bottlenecks. Pixel data is also transferred between Matrox Genesis Main and Processor boards as well as the host, via multiple high-speed data paths like the PCI bus, Matrox Grab Port and VM Channel.
While host CPU speeds have increased, the architecture of the PCI-based Matrox Genesis vision subsystem is the appropriate choice for demanding applications where high-rate, high-resolution video images need to be processed in real time. As illustrated below, when convolution kernel size increases beyond the typical 3x3 matrix, the increased power available with a specialized processor such as the Matrox NOA, embedded in a scalable, high-performance architecture like Matrox Genesis, becomes indispensable.
Comparative Performance of a Speed-up of a Convolution

Kernel Size Pentium II @ 300 MHz Matrox NOA @ 50 MHz
5 x 5 43.1 msec 4.1 msec
7 x 7 61.3 msec 5.6 msec
9 x 9 107.9 msec 8.3 msec
Harnessing the power of this custom ASIC, as well as the functionality of Matrox Genesis Main and Processor boards is easily accomplished using either the board specific 'C' library or platform independent Matrox Imaging Library (MIL). Both are designed to automatically make use of on-board accelerators and offer hundreds of high-level imaging functions to the programmer, minimizing or eliminating the need to develop algorithms or functions from scratch.
For more information, contact our Media Relations Team.
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