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Sustaining high bandwidth I/O for C80-based image processing
Analogous to Intel's 430 and 440 family of chipsets (a.k.a."Triton" and "Natoma"), which support high bandwidth transfers between RAM, CPU, and PCI; a new video interface chip supports high bandwidth transfers between SDRAM, C80, and PCI; as well as performs other transfers and data formatting.
Texas Instruments' TMS320C80 DSP is fast becoming a processor of choice for many image processing applications. The C80 is optimized for imaging operations, integrating a 32-bit RISC master processor and four advanced 32-bit integer DSPs; 50 KB of RAM, an on-chip crossbar, a 64-bit transfer controller, and a video controller.
The challenges in using the C80 for image processing are reminiscent of the challenges that vision system developers faced when they started using the Pentium or Pentium Pro. The chip is fast, but processing can be slowed down by I/O bottlenecks. So Intel designed the 430 and 440 PCI core logic chipsets to provide the required high bandwidth I/O. This was also the route that Matrox took in designing the VIA (video interface ASIC). It's a processor support chip, to perform optimized transfers and off-load the C80 of all data management tasks. Therefore it keeps the C80 dedicated to processing and fed with data.
The VIA, C80, SDRAM and an optional processor (called the NOA - neighborhood operations accelerator) form a processing core on the Matrox Genesis imaging boards. The main board consists of a grab module, a processing core and a display section. The processor board has one or two cores. The VIA manages all data interface within the system, including on-board transfers, transfers between boards and to/from external resources, such as the host CPU.
The VIA integrates a 64-bit glue-less SDRAM memory port, a 32-bit grab port interface, a 32-bit PCI bus Master/Slave interface, and a 32-bit VESA Media Channel interface. (The VMChannel is used as a secondary bus for transfers to display and off-board, e.g. between the main board and processor board.) The VIA implements bus arbitration, maintaining high bandwidth on each interface and the lowest latency on the most time critical operations.
Besides being arbitrator, another "430-like" task is write posting. When a PCI peripheral needs access to system RAM, rather than setting up a transfer for every pixel, the 430 queues up the pixels and bursts them to memory. With the VIA's grab port, grabbed data is queued in the on-chip FIFO and then burst over the local 400 MB/s memory bus to SDRAM. In this way, the processing is not slaved to the speed of the acquisition.
As well, the VIA's PCI interface performs write posting and read prefetch operations, optimizing transfers between host and on-board memory, and between C80 and system RAM. With the VIA, the C80 has full access to the 4GB address space on PCI, including access to the memory of all other C80s that may be present in a multi-board configuration.
Image data reconstruction is another VIA task designed to keep the C80 at full throttle. For example, for acquiring from multitap cameras which output non-consecutive pixels simultaneously (simultaneous odd/even line or odd/even pixel readout),the VIA takes this non-consecutive camera pixel data and reconstructs it in memory in real time. Time-multiplexed acquisition from digital RGB color line scan cameras also requires reformatting on-the-fly. The VIA allows the C80 to forgo the reconstruction and concentrate on processing.
A common requirement for many high-end image processing applications is live display of grabbed and processed images, therefore to meet this objective the main board features a display section with a second VIA. Image data is transferred from the processing core to the display section over the VMChannel. The second VIA writes to the WRAM (image display buffer); performing sub-sampling, zooming and tagging (for selecting specific pixels to write to memory). Since the VIA controls memory readout to the RAMDAC and generates timing signals etc., the C80 does not have to "waste" its time on display management.
Using an interface ASIC enables not only optimized data management for acquisition, processing and display, but also allows integration of these three major functions on one board. It replaces the functionality of multiple components and provides optimal use of the pathways on the board; other solutions would require the use of at least two boards to support all three functions and would lead to bottlenecks, especially if the PCI bus is used for sending the image from acquisition to processing or display.
Intel built core logic chipsets like the "Triton" and "Natoma" so that system designers could extract the full power of the Pentium and Pentium Pro processors for general purpose computing; the Matrox VIA is intended to extract the full processing power of the C80 specifically for image processing. It was designed to handle the interface requirements of an imaging subsystem performing simultaneous real-time acquisition, processing and display of high speed video.
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